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The 65k Project

The 65k project is my project to expand the original 6502 processor with new opcodes, new and/or larger registers and other advanced features. The goal of this project is to enable the 6502 to be used in modern microcontroller and even PC-like applications that require more than what the 6502 currently has.

I chose the 65k name to honor that the design numbers have 5 digits instead of 4, but still starting with 65 as the 6502. I believe this heritage is justified, as the processor is a direct extension, and to a very large part compatible with the original 6502, and also uses a similar - but extended - internal architecture.

Before you ask why - I am doing this purely for personal education purposes. I have no idea if this processor will ever be finished or even implemented, but at least I'll try. It may take some time though.

The current state of the project is the requirements, decision, and partly design phase. I.e. I am defining the goals I want to achieve with the 65k processor, what features it should have, how it should be done - but I am not writing any VHDL code for now.

On the features page you can read about the requirements and features I have decided on for the 65k.

Note the separation between specification and implementation. The 65k specification is just that - a specification that anyone can implmenent. As such it is licensed under the Creative Commons Attributable Share-Alike license, i.e. anyone who shares derivative works has to attribute the contributors, and has to give similar rights. The specification does not include the implementation. Someone may just as well create a fully commercial implementation - I actually hope that someone will take this specs and create a brand new 6502ish CPU!

The implementation section below describes my own implementation of the 65k specs. It is thus separate from the actual specification. The description documents are also under Creative Commons Attribution Share-Alike. For the VHDL code I have decided to use the LGPL.

To my understanding the techniques described here have been used by various processors for decades already. Still there is no guarantee that a processor according to this spec would not be covered by some patents.

Before a new processor is designed, it needs to be discussed what it should actually be able to do, what features it should have and how these features should be implemented. Making yourself clear about the outline is the first step.

  • Feature discussion - A (somewhat lengthy) discussion of what features to include, and how to implement these features

These documents describe and specify the 65k processors and as such at least the programming model is to be seen as a real specification.

Not all documents have been written or even finalized yet.

  • Implementation specs I - programming model - opcode definitions, register sets, functional definition - working draft
  • Design Notes - Notes and comments about the actual design and how I got there.
  • Implementation specs II - hardware model - external interface options, signal definitions - to be done

These documents describe my implementation of the 65k.

Not all documents have been written or even finalized yet.

  • Architecture overview - processor architecture, component definitions - initial draft
  • Test setup - Before starting the implementation, define how to test it - initial draft
  • Implementation - Implementation documentation - to be done
  • Hardware implementation - FPGA boards and hardware setups - to be done

This section describes the different versions of the 65k processor, at least what the current plans for it are. All processors implement the 65k specifications up to a point as defined in this roadmap - leaving out optional parts.

The idea behind this is that it will be easier to implement a "smaller" CPU first, find the bugs and fix them, then expand it, than to directly start with a full-featured CPU where bugs may be even more difficult to find.


Now that the 65002 is materializing, I have updated the roadmap.

Design goals for the 65002 CPU replacement are:

  • Provide original 6502 (legal) opcodes, plus the 65k opcodes up to 64 bit
  • Compile-time configurable for 16, 32, or 64 bit ...
  • Compile-time configurable for 8 or 16 bit maximum memory width (16 bit mmw can still use 8 bit memory)
  • User- and hypervisor mode
  • ABORT functionality
  • No further expansion, i.e. no MMU
  • No QUICK opcodes, no MV operations, no multicore-related opcodes


Design goals for the 65010 CPU include what is still missing from the 65002:

  • Extension of the 65002 CPU from above
  • Improve performance in terms of maximum clock frequency
  • Add optional segment-based memory management (segment mapping as described in the specs)
  • Add QUICK opcodes, as well as MV opcodes
  • Add multi-core functionality - coordinating/synchronizing multiple cores in a single FPGA
  • Add integer multiplication/division


Design goals for the further 650x0 CPUs are:

  • Extension of the 65010 CPU from above
  • Improve performance in terms of MIPS
  • Make the new additions more like options to the original core
  • MMU option (to replace the segment-based mapping)
  • Add vector operations to the CPU core, like vector add. Allow different address offsets for source and target (from 0 up to 256)
  • Include for example blitter functions
  • Add floating point ops
  • Optionally 32bit memory interface, possibly with write-back cache/write combining, to allow for very-fast-RAM usage that is only available with 16 or more bit
  • Optional caching for high clock frequency versions


In addition to a new CPU, I'd probably try to make a bug-fixed 6522, or a 6526 replacement...


No warranty! Subject to change without notice! There is no guarantee that this specification will actually work, or will ever be implemented

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Last modified: 2012-04-12

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    2011-01-02 Some updates to the programming specs.
    2010-10-23 Published the first 65k draft
    2010-10-16 Clarified licensing, overworked roadmap.
    2010-09-18 Started this page