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The 65k Project - Testing

Before knowing whether a system works as expected, you need to test it. This page describes the test setup (as is currently planned).

As the processor is implemented as VHDL, there are two test options - one is to implement it in a programmable logic device, but also simulating the VHDL directly on a PC. Both type of tests are (will be) described here.

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    2010-10-14 Started this page

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This content is licensed under the Creative Commons Attribution Share-Alike license, CC-BY-SA version 3.0.

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Disclaimer

The content comes with no warranty at all! There is no guarantee and no promise that this specification is correct, consistent, will actually work, or will ever be implemented at all.

To my understanding the techniques described here have been used by various processors for decades already. Still there is no guarantee that a processor according to this spec would not be covered by some patents.

Subject to change without notice!

Contributors

Changes

This section describes the changes to the document:

DateAuthorChanges

The VHDL implementation will be written compatible to the GHDL compiler of the GNU compiler collection. The GHDL compiler allows to simulate VHDL code. It also allows to link C-code to the VHDL code during the link process. Therefore the VHDL test cases will be controlled using code written in C, that allows to load test data input from files and use it for example as ROM content, and compare VHDL simulation output with other test data also read from a file. This way test cases can easily be written, with test data as 65k executable code being provided as a file, and output comparable with pre-computed data.


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Last modified: 2010-12-31
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