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CS/A65 Computer Board Memory Map

This page gives a memory map of the currently available boards, so you can plan which boards can be combined in what ways.

This section summarizes the I/O memory addresses used by the different boards into one table, so you can try to find out which boards are compatible.

Many boards have jumpers to set the I/O area. In these tables all possible addresses are documented, with "(default)" for the default setting, and "(opt)" for the other settings.

I/O $E8**

Table for $8** I/O addresses
$80* $81* $82* $83* $84* $85* $86* $87* $88* $89* $8a* $8b* $8c* $8d* $8e* $8f*
Main boards
PETCPUUART
Main BIOSControl, UART (opt)Control, UART (opt)
AUXCPUAUXCPU control (default)AUXCPU control (opt)
I/O boards
VideoCRTC, Control (default)CRTC, Control (opt)
PETIOPIA1 (default)PIA2 (default)VIA (default)
EthernetCS8900A (default)CS8900A (opt)
PC floppyWD1770 (opt)VIA (opt)WD1770 (default)VIA (default)
DRVIOWD177x, Control (default)CIA (default)WD177x, Control (opt)CIA (opt)
DUARTUART1, UART2
SCSISCSI (opt)SCSI (Default)
RamdiskRamdisk (default)Ramdisk (opt)
Special purpose boards
VIA PrototypingVIA (alt1)VIA (alt2)
Block Transfer engineBlitter (alt)
Deprecated boards
csakeyPIA1, ACIA (default)PIA1, ACIA (opt)
csaiecPIAVIA

I/O $EB**

Table for $b** I/O addresses
$b0* $b1* $b2* $b3* $b4* $b5* $b6* $b7* $b8* $b9* $ba* $bb* $bc* $bd* $be* $bf*
Main boards
CPU816$ebff Control (default)

I/O $EC**

Table for $c** I/O addresses
$c0* $c1* $c2* $c3* $c4* $c5* $c6* $c7* $c8* $c9* $ca* $cb* $cc* $cd* $ce* $cf*
Main boards
GeckoUARTVIA
Special purpose boards
USB+EthernetCS8900ASL811HS (device 0-7)
SL811HS (host 8-f)
keyemushared RAM keybd1
Deprecated boards
csakeyPIA1, ACIA (prototype)

I/O $ED**

Table for $d** I/O addresses
$d0* $d1* $d2* $d3* $d4* $d5* $d6* $d7* $d8* $d9* $da* $db* $dc* $dd* $de* $df*
Special purpose boards
keyemushared RAM keybd2

I/O $EF**

Table for $f** I/O addresses
$f0* $f1* $f2* $f3* $f4* $f5* $f6* $f7* $f8* $f9* $fa* $fb* $fc* $fd* $fe* $ff*
Main boards
Main CPUControl reg, CPU addr MMU
Main BIOSControl, UART (opt)Control, UART (default)
CPU816$efff Control (opt)
I/O boards
VideoCRTC, Control (opt since 1.4)CRTC, Control (opt since 1.4)
PETIOPIA1 (opt)PIA2 (opt)VIA (opt)
Special purpose boards
COPROControl register
Block Transfer engineBlitter (alt)

Note: The csakey schematics actually shows $e9x only, while my implementation has $e1x for PET compatibility and a jumper for $c1x.

Note: The PC floppy schematics actually shows $8e*/8f* only, but for testing I found it incompatible with the PETCPU. So my prototype has a jumper now.

This section summarizes the bus (physical) memory addresses used by the different boards into one table, so you can find out which boards are compatible.

Many boards have jumpers to set the memory area. In these tables all possible addresses are documented, with "(default)" for the default setting, and "(opt)" for the other settings.

The table uses sections of 64k

Map

Table for bus memory addresses
$0**** $1**** $2**** $3**** $4**** $5**** $6**** $7**** $8**** $9**** $a**** $b**** $c**** $d**** $e**** $f****
Main boards
Main BIOS (ex.1 - max RAM, V3.0+ boards)32k boot RAM, 32k boot ROM256k ROM ($48000-$4FFFF shared as boot)512k RAM ($80000-$87FFF shared as boot)
Main BIOS (ex.2 - max ROM, V3.0+ boards)32k boot RAM, 32k boot ROM256k RAM ($40000-$47FFF shared as boot)512k ROM ($88000-$8FFFF shared as boot)
Main BIOS (ex.3 - minimum, and V2.x boards)32kRAM, 32kROM
Gecko (V2.1+, when used with a Main CPU)32k RAM, 32k ROM
I/O boards
Video64k dRAM, partially used as Video RAM (default)64k RAM (opt)
Special purpose boards
CSAEMU64k window into emulated CPU address space

Note: the BIOS board has a plethora of jumpers and options. The examples shown are only a few of the available possibilities)

Last modified: 2007-05-26.

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