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CS/A65 PETCPU

This board implements a 6502 processor board for the CS/A65 bus system. It in addition to the CPU65b board it allows to use (small parts) of the memory area of the CS/A65 bus. This can be utilized to access the video board to implement a video interface.

News:

Table of content

  • Driver
  • RS232 test
  • Board Revisions
  • 1.1B (untested)
  • 1.1A (prototype with bugs)
  • Driver

    RS232 test

    This file includes a small test program for the RS232 interface. It opens the RS232 interface with 9600 baud, and mirrors everything it receives from RS232 back to RS232. Additionally it sends everything typed in on the screen to the RS232. The screen also works as buffer area, so it is easy to monitor the progress. It can be loaded into a PET fat40 setup (just 'dL"petuart"' :-) and RUN.

    driver petuart.tar.gz

    Board revisions

    Version: 1.1B

    Status: untested

    Notes

    warn This schematics has been tested by modifying the 1.1A board version, but the layout itself has not been tested. It mainly adds a driver for the Phi2 signal, and has been tested with the MOS6502 (1MHz), Rockwell R6502AD and R65C02P4 (1 and 2MHz each).
    msg This page describes the jumper settings available on the board.

    Files

    schem csa_petcpu_v1.1b.sch
    schem csa_petcpu_v1.1b-sch.png
    layout csa_petcpu_v1.1b.brd
    layout csa_petcpu_v1.1b-lay.png
    desc csa_petcpu_v1.1b-desc.txt

    Version: 1.1A

    Status: prototype with bugs

    Notes

    warn This board has been tested and I found a severe bug in the timing in combination with the NMOS 6502: the NMOS 6502 can not drive the Phi2 signal with sufficient power on the bus, so the board works with the CMOS 6502 version only. Please see the 1.1B version for a comparison.

    Files

    schem csa_petcpu_v1.1a.sch
    schem csa_petcpu_v1.1a-sch.png
    layout csa_petcpu_v1.1a.brd
    layout csa_petcpu_v1.1a-lay.png
    photo csa_petcpu_v1.1a.jpg(There are two more ICs underneath the UART)