CS/A65 SPI Interface

This page is actually not about a complete board, but it documents the ways I use to connect SPI devices to the 6502. The first part actually is the interface to the SPI interface of MMC and SD-Cards.

Table of content

SPI

MMC and SD-Cards in a 6502 system

1.0A (prototype)

SPI

SPI means "Serial Peripheral Interface Bus" and is a very simple four-wire protocol. Some of the advantages are:

Each signal is single direction, there are no bi-directional signals
It is a synchronous bus and clock is controlled by a single source.
It is byte-oriented

One of its disadvantages is: it is not exactly well specified:

There are these four lines:

Signal	Direction	Description
/SEL	SPI Master -> SPI Slave	If low, the selected device is selected. A master may have multiple of those outputs, but a slave has only one input
CLK	SPI Master -> SPI Slave	Clock for data transfers
MOSI	SPI Master -> SPI Slave	Data from master to slave
MISO	SPI Slave -> SPI Master	Data from slave to master

Beyond that the CLK levels and at which CLK transition the data is transferred is not defined!

SPI Modes

For this reason there are different possibilities:

CPOL=0/1: base value of the clock. I.e. the level of the CLK signal when no data transfer is going on.
CPHA=0/1: The transition of the clock (leading or trailing edge) on which the data is transferred

This results in the fact that there are four SPI modes,

Mode	CPOL	CPHA
0	0	0
1	0	1
2	1	0
3	1	1

Unfortunately some devices only understand a single mode, and different from other devices, so a master should be able to handle all modes.

MMC and SD-Cards

MMC-Card and SD-Cards are cheap means of getting large amounts of storage memory nowadays. And they are getting larger and cheaper every day. Those cards are based on flash memory and can be found in digital cameras, navigation systems, and many more.

Unfortunately the MMC- and SD-Card protocols are not free, however a certain amount of intelligence has been gathered and is available on the web:

as well as in datasheets for MMC or SD-Cards found on the producers homepages.

MMC/SD SPI mode

Newer MMC and especially SD-Cards use a mode where more than a single bit is transferred per clock. In fact the cards have four data lines that are used in native mode. This mode is however more complicated. But, we are lucky, all cards still support the SPI mode, that they can enter upon startup when instructed to do so. And this is what the driver does.

One problem I had in the beginning was that the datasheets mentioned the data transfer on the rising edge of the clock, but not what clock level would be correct. By experimentation I found that MMCs and SD-Cards use mode 0.

MMC and SD-Cards in a 6502 system

In a 6502 system several issues have to be considered:

Operating Voltage

The MMC and SD-Cards can operate with different operation voltages, but not with voltages as high as 5 Volt.

Fortunately I had, with my new PWR board, a 3.3V power supply I could use. Doing the signal voltage conversion was more difficult. As shown on USB-based Atmel/AVR Programmer: Level Converter, a 74VHC04 could be used to handle 5 Volt inputs even when powered with 3.3V - and giving 3.3V to the output. This IC, however, is SMD and hard to get, so I went for the slower (in terms of operating frequency) solution with open collector drivers as you can see in the schematics.

Fortunately the MMC boards are CMOS devices, and CMOS devices have a higher "high level" compared to standard TTL (see for example Logic Voltage Thresholds for TTL, CMOS, ...). Thus an output of a 3.3V-driven CMOS IC can still drive 3V, which for a 5V TTL chips easily is a high level. Therefore a 74LS* IC should suffice. According to the Level converter page above I successfully used a 74HCT family IC.

SPI Mode

The MMC and SD-Cards operate with SPI mode 0. First I thought I could use the VIA 6522 shift register (SR) to handle the SPI port. As it turned out, however, the VIA SR transfers data out at the first (falling) transition of its clock, so it can be latched by the second (rising) edge by the receiver. This would be SPI mode 3. You could reverse clock, but you cannot make the VIA shift our earlier. So there is no way to use the VIA SR. Instead I now use a bit-banging approach with CLK and MOSI.

For MISO, hoever, I decided to use an external shift register. This approach seemed to make sense with the VIA SR, as transfers work in both directions at the same time. Now it is just a convenience.

Driver

OS/A65 SPI driver

This is a test driver for the SPI schematics below. It initializes the card, reads the operations conditions register, the card id data, and can read and write a block.

Please note that it is clutterd with debug code.

sdcard.tar.gz

Board revisions

Version: 1.0A

Status: prototype

Notes

	I have built this schematics on a prototyping board, so there is no board layout for it.
	You may not the input shift register. This is not really necessary if you bit-bang the input as well. It is convenient, however, and a remainder of an earlier approach using the VIA shift register (which did not work unfortunately).
	For hot-plugging another capacitor may be needed in the power supply lines for the card.

Files

	csa_viaspi-v1.0a.sch
	csa_viaspi_v1.0a-sch.png